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T. Iwamatsu · SciRah

Researcher profile · Semantic Scholar

T. Iwamatsu

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T. Iwamatsu — researcher profile on SciRah

h-index: 16
Works: 123
Citations: 674

Most-cited papers

6.5 kV schottky-barrier-diode-embedded SiC-MOSFET for compact full-unipolar module
Koutarou Kawahara, S. Hino, K. Sadamatsu, Yukiyasu Nakao +6 more
2017International Symposium on Power Semiconductor Devices and IC's62 citations
Semantic Scholar
Carrier transport properties in inversion layer of Si-face 4H–SiC MOSFET with nitrided oxide
M. Noguchi, T. Iwamatsu, H. Amishiro, H. Watanabe +3 more
2019Japanese Journal of Applied Physics31 citations Open access
Semantic Scholar
Impact of Embedding Schottky Barrier Diodes into 3.3 kV and 6.5 kV SiC MOSFETs
Koutarou Kawahara, S. Hino, K. Sadamatsu, Yukiyasu Nakao +4 more
2018Materials Science Forum30 citations Open access
Semantic Scholar
A 0.05×0.05mm2 RFID Chip with Easily Scaled-Down ID-Memory
M. Usami, H. Tanabe, Akira Sato, Isao Sakama +4 more
20072007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers26 citations
Semantic Scholar
Determination of intrinsic phonon-limited mobility and carrier transport property extraction of 4H-SiC MOSFETs
M. Noguchi, T. Iwamatsu, Hiroyuki Amishiro, H. Watanabe +2 more
2017International Electron Devices Meeting25 citations
Semantic Scholar
Substrate-bias effect and source-drain breakdown characteristics in body-tied short-channel SOI MOSFET's
S. Maeda, Y. Hirano, Y. Yamaguchi, T. Iwamatsu +6 more
199925 citations
Semantic Scholar
Silicon on thin BOX (SOTB) CMOS for ultralow standby power with forward-biasing performance booster
T. Ishigaki, Ryuta Tsuchiya, Y. Morita, H. Yoshimoto +7 more
2008European Solid-State Device Research Conference24 citations
Semantic Scholar
A 0.5V 100MHz PD-SOI SRAM with enhanced read stability and write margin by asymmetric MOSFET and forward body bias
K. Nii, M. Yabuuchi, Y. Tsukamoto, Y. Hirano +2 more
2010IEEE International Solid-State Circuits Conference23 citations
Semantic Scholar
Feasibility of 0.18 /spl mu/m SOI CMOS technology using hybrid trench isolation with high resistivity substrate for embedded RF/analog applications
S. Maeda, Y. Wada, K. Yamamoto, H. Komurasaki +9 more
200120 citations
Semantic Scholar
Gate Oxide Instability and Lifetime in SiC MOSFETs under a Wide Range of Positive Electric Field Stress
M. Noguchi, A. Koyama, T. Iwamatsu, H. Amishiro +2 more
2020International Electron Devices Meeting19 citations
Semantic Scholar
70 nm SOI-CMOS of 135 GHz f/sub max/ with dual offset-implanted source-drain extension structure for RF/analog and logic applications
Takuji Matsumoto, S. Maeda, K. Ota, Y. Hirano +11 more
2001International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)19 citations
Semantic Scholar
Mechanism of Depletion-Mode TDDB for 4H-SiC MOS Structure
Tomokatsu Watanabe, S. Hino, T. Iwamatsu, S. Tomohisa +1 more
2017IEEE transactions on device and materials reliability16 citations
Semantic Scholar
Approaches to extra low voltage DRAM operation by SOI-DRAM
T. Eimori, T. Oashi, F. Morishita, T. Iwamatsu +11 more
199816 citations
Semantic Scholar
Wide-Range Threshold Voltage Controllable Silicon on Thin Buried Oxide Integrated with Bulk Complementary Metal Oxide Semiconductor Featuring Fully Silicided NiSi Gate Electrode
T. Ishigaki, R. Tsuchiya, Yusuke Morita, N. Sugii +5 more
200815 citations Open access
Semantic Scholar
A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology
K. Ishibashi, N. Sugii, K. Usami, H. Amano +21 more
20142014 IEEE COOL Chips XVII14 citations
Semantic Scholar
Coulomb-limited mobility in 4H-SiC MOS inversion layer as a function of inversion-carrier average distance from MOS interface
M. Noguchi, T. Iwamatsu, H. Amishiro, H. Watanabe +2 more
2020Japanese Journal of Applied Physics13 citations Open access
Semantic Scholar
Hall effect mobility in inversion layer of 4H-SiC MOSFETs with a thermally grown gate oxide
M. Noguchi, T. Iwamatsu, H. Amishiro, H. Watanabe +2 more
2019Japanese Journal of Applied Physics13 citations Open access
Semantic Scholar
Gate Oxide Instability against a Wide Range of Negative Electric Field Stress of SiC MOSFETs
M. Noguchi, A. Koyama, T. Iwamatsu, H. Watanabe +1 more
2021International Electron Devices Meeting12 citations
Semantic Scholar
A Robust SOI SRAM Architecture by using Advanced ABC technology for 32nm node and beyond LSTP devices
Y. Hirano, M. Tsujiuchi, Kozo Ishikawa, Hirofumi Shinohara +12 more
20072007 IEEE Symposium on VLSI Technology10 citations
Semantic Scholar
Body Potential Control via p-Type Contact Resistance and Its Influence on Switching Characteristics of 4H-SiC MOSFETs
T. Tominaga, T. Iwamatsu, Yukiyasu Nakao, H. Amishiro +4 more
2022IEEE Transactions on Electron Devices9 citations
Semantic Scholar
Hall effect mobility for SiC MOSFETs with increasing dose of nitrogen implantation into channel region
M. Noguchi, T. Iwamatsu, H. Amishiro, H. Watanabe +2 more
20189 citations Open access
Semantic Scholar
Direct Measurement of Transient Drain Currents in Partially-Depleted SOI N-Channel MOSFETs Using a Nuclear Microprobe for Highly Reliable Device Designs
T. Iwamatsu, K. Nakayama, H. Takaoka, M. Takai +6 more
20009 citations Open access
Semantic Scholar
Improvement in the Channel Performance and NBTI of SiC-MOSFETs by Oxygen Doping
M. Noguchi, T. Iwamatsu, Hiroyuki Amishiro, H. Watanabe +2 more
2019International Electron Devices Meeting7 citations
Semantic Scholar
Statistical Analysis of Subthreshold Swing in Fully Depleted Silicon-on-Thin-Buried-Oxide and Bulk Metal–Oxide–Semiconductor Field Effect Transistors
T. Mizutani, Yoshiki Yamamoto, H. Makiyama, T. Iwamatsu +3 more
20137 citations Open access
Semantic Scholar
Design consideration of 0.4V-operation SOTB MOSFET for super low power application
H. Makiyama, K. Horita, T. Iwamatsu, H. Oda +3 more
20112011 International Meeting for Future of Electron Devices7 citations
Semantic Scholar
Evaluation of Threshold-Voltage Variation in Silicon on Thin Buried Oxide Complementary Metal–Oxide–Semiconductor and Its Impact on Decreasing Standby Leakage Current
N. Sugii, R. Tsuchiya, T. Ishigaki, Yusuke Morita +6 more
20097 citations
Semantic Scholar
Bulk-layout-compatible 0.18-/spl mu/m SOI-CMOS technology using body-tied partial-trench-isolation (PTI)
Y. Hirano, S. Maeda, Takuji Matsumoto, K. Nii +7 more
20017 citations
Semantic Scholar
Reliability testing for the next generation of ULSI with SOI MOSFETs
M. Takai, K. Nakayama, H. Takaoka, T. Iwamatsu +5 more
19997 citations
Semantic Scholar
Analysis of delay time instability according to the operating frequency in field shield isolated SOI circuits
S. Maeda, Y. Yamaguchi, I. J. Kim, T. Iwamatsu +9 more
19987 citations
Semantic Scholar
Channel engineering of 4H-SiC MOSFETs using sulphur as a deep level donor
M. Noguchi, T. Iwamatsu, Hiroyuki Amishiro, H. Watanabe +2 more
2018International Electron Devices Meeting6 citations
Semantic Scholar
Evaluation of surface defects on SIMOX and their influences on device characteristics
H. Naruoka, T. Iwamatsu, T. Tanaka, N. Hattori +5 more
20005 citations
Semantic Scholar
A 44μW/10MHz minimum power operation of 50K logic gate using 65nm SOTB devices with back gate control
S. Morohashi, N. Sugii, T. Iwamatsu, S. Kamohara +3 more
2013IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference4 citations
Semantic Scholar
An SOI-Based 7.5/spl mu/m-Thick 0.15x0.15mm2 RFID Chip
M. Usami, Akira Sato, H. Tanabe, T. Iwamatsu +2 more
2006IEEE International Solid-State Circuits Conference4 citations
Semantic Scholar
Reliability study of bulk and SOI SRAMs using high energy nuclear probes
S. Abo, Hiroto Yamagiwa, T. Iwamatsu, S. Maegawa +5 more
20054 citations
Semantic Scholar
Impact of 0.18 /spl mu/m SOI CMOS technology using hybrid trench isolation with high resistivity substrate on embedded RF/analog applications
S. Maeda, Y. Wada, K. Yamamoto, H. Komurasaki +9 more
20002000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)4 citations
Semantic Scholar
Analyses of the Radiation-Caused Characteristics Change in SOI MOSFETs Using Field Shield Isolation
Y. Hirano, S. Maeda, W. Fernandez, T. Iwamatsu +3 more
19984 citations Open access
Semantic Scholar
Speed enhancement at Vdd = 0.4 V and random τpd variability reduction and analyisis of τpd variability of silicon on thin buried oxide circuits
H. Makiyama, Yoshiki Yamamoto, H. Shinohara, T. Iwamatsu +4 more
20143 citations Open access
Semantic Scholar
Comparison and distribution of minimum operation voltage in fully depleted silicon-on-thin-buried-oxide and bulk static random access memory cells
T. Mizutani, Yoshiki Yamamoto, H. Makiyama, H. Shinohara +4 more
20143 citations Open access
Semantic Scholar
Evaluation of Soft Errors in DRAM and SRAM using Nuclear Microprobe and Neutron Source
M. Takay, Y. Arita, S. Abo, T. Iwamatsu +5 more
2001European Solid-State Device Research Conference3 citations
Semantic Scholar
Bulk-layout-compatible 0.18 /spl mu/m SOI-CMOS technology using body-fixed partial trench isolation (PTI)
Y. Hirano, S. Maeda, Takuji Matsumoto, K. Nii +7 more
19991999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)3 citations
Semantic Scholar
Invited: Limiting factors of inversion layer mobility in Si-face 4H-SiC MOSFETs
M. Noguchi, T. Iwamatsu, Hiroyuki Amishiro, H. Watanabe +2 more
2019International Meeting for Future of Electron Devices, Kansai2 citations
Semantic Scholar
Ultralow-Voltage Operation SOTB Technology toward Energy Efficient Electronics
N. Sugii, T. Iwamatsu, Yoshiki Yamamoto, H. Makiyama +7 more
20132 citations
Semantic Scholar
Evaluation of soft error rates using nuclear probes in bulk and SOI SRAMs with a technology node of 90 nm
S. Abo, Naoyuki Masuda, F. Wakaya, S. Onoda +4 more
20102 citations
Semantic Scholar
Electrical Characteristics and Crystal Quality Analysis of Thin-Body <100> Channel Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors Using Two-Step Elevated Silicon Epitaxial Process
T. Iwamatsu, Takashi Terada, Kozo Ishikawa, H. Oda +1 more
20092 citations Open access
Semantic Scholar
A Robust Silicon-on-Insulator Static-Random-Access-Memory Architecture by using Advanced Actively Body-Bias Controlled Technology
Y. Hirano, M. Tsujiuchi, Kozo Ishikawa, H. Shinohara +12 more
20082 citations Open access
Semantic Scholar
Influence of recovery characteristics on switching behavior of SiC MOSFETs
T. Tominaga, T. Iwamatsu, Yukiyasu Nakao, H. Amishiro +4 more
2020Japanese Journal of Applied Physics1 citations Open access
Semantic Scholar
Accuracy of the Energy Distribution of the Interface States at the SiO2/SiC Interface by Conductance Method
M. Noguchi, T. Iwamatsu, H. Amishiro, H. Watanabe +3 more
20161 citations Open access
Semantic Scholar
Statistical Analysis of Subthreshold Swing in Fully Depleted Silicon-on-Thin-BOX (SOTB) MOSFETs and Bulk MOSFETs
T. Mizutani, Yoshiki Yamamoto, H. Makiyama, T. Tsunomura +4 more
20121 citations
Semantic Scholar
Delayed-ABC SOI for crosstalk noise repair
Akira Tada, H. Notani, G. Tanaka, T. Iwamatsu +4 more
2008IEICE Electronics Express1 citations Open access
Semantic Scholar
Evaluation of Threshold-Voltage Variation in Silicon on Thin BOX (SOTB) CMOS and its Impact on Decreasing Standby Leakage Current
N. Sugii, R. Tsuchiya, T. Ishigaki, Y. Morita +6 more
20081 citations
Semantic Scholar

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