J. Portal

Most-cited papers

Robust Compact Model for Bipolar Oxide-Based Resistive Switching Memories
M. Bocquet, D. Deleruyelle, H. Aziza, C. Muller +3 more
2014IEEE Transactions on Electron Devices111 citations Open access
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Digital Biologically Plausible Implementation of Binarized Neural Networks With Differential Hafnium Oxide Resistive Memory Arrays
T. Hirtzlin, M. Bocquet, Bogdan Penkovsky, Jacques-Olivier Klein +4 more
2019Frontiers in Neuroscience70 citations Open access
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A memristor-based Bayesian machine
Kamel-Eddine Harabi, T. Hirtzlin, C. Turck, E. Vianello +6 more
2021Nature Electronics64 citations Open access
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Powering AI at the edge: A robust, memristor-based binarized neural network with near-memory computing and miniaturized solar cell
F. Jebali, A. Majumdar, Clément Turck, Kamel-Eddine Harabi +12 more
2023Nature Communications57 citations Open access
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Stochastic Computing for Hardware Implementation of Binarized Neural Networks
T. Hirtzlin, Bogdan Penkovsky, M. Bocquet, Jacques-Olivier Klein +2 more
2019IEEE Access36 citations Open access
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Experimental Demonstration of Multilevel Resistive Random Access Memory Programming for up to Two Months Stable Neural Networks Inference Accuracy
E. Esmanhotto, T. Hirtzlin, Djohan Bonnet, N. Castellani +3 more
2022Advanced Intelligent Systems26 citations Open access
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SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures
A. Levisse, B. Giraud, J. Noël, M. Moreau +1 more
2015Non-Volatile Memory Technology Symposium25 citations Open access
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Design and Simulation of a 128 kb Embedded Nonvolatile Memory Based on a Hybrid RRAM (HfO2 )/28 nm FDSOI CMOS Technology
J. Portal, M. Bocquet, S. Onkaraiah, M. Moreau +8 more
2017IEEE transactions on nanotechnology23 citations Open access
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Development of a CMOS Oscillator Concept for Particle Detection and Tracking
K. Castellani-Coulié, H. Aziza, W. Rahajandraibe, G. Micolau +1 more
2013IEEE Transactions on Nuclear Science21 citations
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Compact modeling solutions for OxRAM memories
M. Bocquet, D. Deleruyelle, H. Aziza, C. Muller +1 more
2013IEEE Faible Tension Faible Consommation19 citations
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Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction
T. Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, N. Locatelli +4 more
2019IEEE/ACM International Symposium on Nanoscale Architectures17 citations Open access
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Architecture, design and technology guidelines for crosspoint memories
A. Levisse, Pablo Royer, B. Giraud, J. Noël +2 more
2017IEEE/ACM International Symposium on Nanoscale Architectures17 citations Open access
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Comprehensive Phase-Change Memory Compact Model for Circuit Simulation
C. Pigot, M. Bocquet, F. Gilibert, M. Reyboz +4 more
2018IEEE Transactions on Electron Devices14 citations Open access
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ReRAM ON/OFF resistance ratio degradation due to line resistance combined with device variability in 28nm FDSOI technology
H. Aziza, P. Canet, J. Postel-Pellerin, M. Moreau +2 more
2017Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon14 citations
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A multi‐scale methodology connecting device physics to compact models and circuit applications for OxRAM technology
F. Puglisi, D. Deleruyelle, J. Portal, P. Pavan +1 more
201612 citations Open access
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In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications
Bogdan Penkovsky, M. Bocquet, T. Hirtzlin, Jacques-Olivier Klein +4 more
2020Design, Automation and Test in Europe11 citations Open access
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Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation Per Synapse
Axel Laborieux, M. Bocquet, T. Hirtzlin, Jacques-Olivier Klein +4 more
2020IEEE Transactions on Circuits and Systems Part 1: Regular Papers11 citations Open access
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Resistive memories: Which applications?
F. Clermidy, N. Jovanovic, S. Onkaraiah, Houcine Oucheikh +5 more
2014Design, Automation and Test in Europe11 citations
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1S1R Optimization for High‐Frequency Inference on Binarized Spiking Neural Networks
Joel Minguet Lopez, Q. Rafhay, M. Dampfhoffer, L. Reganaz +13 more
202210 citations Open access
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Resistive RAMs as analog trimming elements
H. Aziza, A. Pérez, J. Portal
201810 citations
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OxRAM-based non volatile flip-flop in 28nm FDSOI
N. Jovanović, O. Thomas, E. Vianello, J. Portal +2 more
2014IEEE International New Circuits and Systems Conference10 citations Open access
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Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations
E. Esmanhotto, T. Hirtzlin, N. Castellani, S. Martin +6 more
2022IEEE International Reliability Physics Symposium9 citations Open access
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Write Termination Circuits for RRAM: A Holistic Approach From Technology to Application Considerations
A. Levisse, M. Bocquet, M. Rios, M. Alayan +6 more
2020IEEE Access9 citations Open access
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Reliable ReRAM-based Logic Operations for Computing in Memory
M. Moreau, E. Muhr, M. Bocquet, H. Aziza +3 more
2018IEEE/IFIP International Conference on Very Large Scale Integration of System-on-Chip9 citations
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Ultra Low Power Charge Pump with Multi-Step Charging and Charge Sharing
Steve Ngueya W, Julien Mellier, Stephane Ricard, J. Portal +1 more
2016International Memory Workshop9 citations
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Embedded high-precision frequency-based capacitor measurement system
L. Welter, Philippe Dreux, J. Portal, H. Aziza
2013IEEE International Symposium on On-Line Testing and Robust System Design9 citations
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RRAM Crossbar Arrays for Storage Class Memory Applications: Throughput and Density Considerations
A. Levisse, B. Giraud, J. Noël, M. Moreau +1 more
2018Conference on Design of Circuits and Integrated Systems8 citations Open access
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Impact of a laser pulse on HfO2-based RRAM cells reliability and integrity
A. Krakovinsky, M. Bocquet, R. Wacquez, J. Coignus +4 more
2016International Conference on Microelectronic Test Structures8 citations Open access
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Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures
A. Levisse, B. Giraud, J. Noel, M. Moreau +1 more
2016IEEE/ACM International Symposium on Nanoscale Architectures8 citations
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Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology
J. Innocenti, L. Welter, F. Julien, L. Lopez +8 more
2014Midwest Symposium on Circuits and Systems8 citations
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Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse
Axel Laborieux, M. Bocquet, T. Hirtzlin, Jacques-Olivier Klein +5 more
2020International Conference on Artificial Intelligence Circuits and Systems7 citations Open access
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Thermal laser attack and high temperature heating on HfO2-based OxRAM cells
A. Krakovinsky, M. Bocquet, R. Wacquez, J. Coignus +1 more
2017IEEE International Symposium on On-Line Testing and Robust System Design7 citations Open access
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Improvement of a detection chain based on a VCO concept for microelectronic reliability under natural radiative environment
K. Coulié-Castellani, W. Rahajandraibe, H. Aziza, J. Portal +1 more
2015Latin American Test Symposium7 citations
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Ge-Se-Sb-N-based OTS scaling perspectives for high-density 1 S1R crossbar arrays
Joel Minguet Lopez, N. Castellani, L. Grenouillet, L. Reganaz +9 more
2021International Memory Workshop6 citations
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Resistive Switching Memory Architecture Based on Polarity Controllable Selectors
A. Levisse, P. Gaillardon, B. Giraud, I. O'Connor +3 more
2019IEEE transactions on nanotechnology6 citations Open access
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Impact of a Laser Pulse on a STT-MRAM Bitcell: Security and Reliability Issues
Mounia Kharbouche-Harrari, J. Postel-Pellerin, G. di Pendina, R. Wacquez +5 more
2018IEEE International Symposium on On-Line Testing and Robust System Design6 citations
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High density emerging resistive memories: What are the limits?
A. Levisse, B. Giraud, J. Noël, M. Moreau +1 more
20172017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS)6 citations
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A novel test structure for OxRRAM process variability evaluation
H. Aziza, M. Bocquet, J. Portal, M. Moreau +1 more
2013Microelectronics and reliability6 citations
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Operation and stability analysis of bipolar OxRRAM-based Non-Volatile 8T2R SRAM as solution for information back-up
A. Makosiej, G. Palma, J. Portal, M. Bocquet +9 more
20136 citations Open access
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On the Investigation of a Novel Dual-Control-Gate Floating Gate Transistor for VCO Applications
A. Marzaki, V. Bidal, R. Laffont, W. Rahajandraibe +3 more
2013Bulletin of Electrical Engineering and Informatics6 citations Open access
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SuperCAST: a full free addressable memory array
V. Della Marca, Julien Guilleau-Tavernier, P. Laine, Franck Melul +6 more
2022International Conference on Microelectronic Test Structures5 citations Open access
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Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks
A. Majumdar, M. Bocquet, T. Hirtzlin, Axel Laborieux +5 more
2021IEEE Transactions on Electron Devices5 citations Open access
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Phase-change memory: A continuous multilevel compact model of subthreshold conduction and threshold switching
C. Pigot, F. Gilibert, M. Reyboz, M. Bocquet +2 more
20185 citations Open access
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Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations
M. Chambonneau, S. Souiki-Figuigui, P. Chiquet, V. Della Marca +4 more
20175 citations Open access
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Multilevel operation in oxide based resistive RAM with SET voltage modulation
H. Aziza, H. Ayari, S. Onkaraiah, M. Moreau +2 more
2016International Conference on Design & Technology of Integrated Systems in Nanoscale Era5 citations
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Comparison of a Readout Chain Dedicated to the Signal Conditioning of a Particle Detector and an Innovative Chain Based on a VCO Concept
S. Ben Krit, K. Coulié-Castellani, W. Rahajandraibe, L. Ottaviani +3 more
2015European Conference on Radiation and Its Effects on Components and Systems5 citations
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Embedded high-precision capacitor measurement system based on ring-oscillator
L. Welter, Philippe Dreux, H. Aziza, J. Portal
20155 citations Open access
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A Multimode Hybrid Memristor-CMOS Prototyping Platform Supporting Digital and Analog Projects
Kamel-Eddine Harabi, Clement Turck, M. Drouhin, A. Renaudineau +6 more
2023Asia and South Pacific Design Automation Conference4 citations Open access
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Storage Class Memory with Computing Row Buffer: A Design Space Exploration
V. Egloff, J. Noel, Maha Kooli, B. Giraud +6 more
2021Design, Automation and Test in Europe4 citations Open access
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Optimization of RRAM and OTS selector for advanced low voltage CMOS compatibility
J. M. Lopez, D. Alfaro Robayo, L. Grenouillet, C. Carabasse +12 more
2020International Memory Workshop4 citations
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