P. Bose

Most-cited papers

Addressing failures in exascale computing
M. Snir, R. Wisniewski, J. Abraham, S. Adve +24 more
2014The international journal of high performance computing applications486 citations Open access
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Active Memory Cube: A processing-in-memory architecture for exascale systems
R. Nair, S. Antão, Carlo Bertolli, P. Bose +28 more
2015IBM Journal of Research and Development203 citations
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Quantifying sources of error in McPAT and potential impacts on architectural studies
S. Xi, H. Jacobson, P. Bose, Gu-Yeon Wei +1 more
2015International Symposium on High-Performance Computer Architecture115 citations
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Understanding Error Propagation in GPGPU Applications
Guan-Peng Li, K. Pattabiraman, Chen-Yang Cher, P. Bose
2016International Conference for High Performance Computing, Networking, Storage and Analysis95 citations
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Understanding the propagation of transient errors in HPC applications
Rizwan A. Ashraf, R. Gioiosa, Gokcen Kestor, R. Demara +2 more
2015International Conference for High Performance Computing, Networking, Storage and Analysis93 citations Open access
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CLEAR: Cross-layer exploration for architecting resilience: Combining hardware and software techniques to tolerate soft errors in processor cores
E. Cheng, S. Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher +7 more
2016Design Automation Conference82 citations Open access
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Safe limits on voltage reduction efficiency in GPUs: A direct measurement approach
Jingwen Leng, A. Buyuktosunoglu, Ramon Bertran, P. Bose +1 more
2015Micro82 citations Open access
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Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities
Ramon Bertran, A. Buyuktosunoglu, P. Bose, T. Slegel +4 more
2014Micro75 citations
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Resilient Low Voltage Accelerators for High Energy Efficiency
Nandhini Chandramoorthy, Karthik Swaminathan, M. Cochet, A. Paidimarri +5 more
2019International Symposium on High-Performance Computer Architecture58 citations
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Investigating the Effects of Task Scheduling on Thermal Behavior
Eren Kursun, Chen-Yong Cher, A. Buyuktosunoglu, P. Bose
2024Social Science Research Network39 citations Open access
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Understanding Soft Error Resiliency of Blue Gene/Q Compute Chip through Hardware Proton Irradiation and Software Fault Injection
Chen-Yong Cher, M. Gupta, P. Bose, K. Muller
2014International Conference for High Performance Computing, Networking, Storage and Analysis37 citations
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The resilience wall: Cross-layer solution strategies
S. Mitra, P. Bose, E. Cheng, Chen-Yong Cher +9 more
2014Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test33 citations
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3D stacking of high-performance processors
P. Emma, A. Buyuktosunoglu, Michael B. Healy, K. Kailas +5 more
2014International Symposium on High-Performance Computer Architecture31 citations
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BRAVO: Balanced Reliability-Aware Voltage Optimization
Karthik Swaminathan, Nandhini Chandramoorthy, Chen-Yong Cher, Ramon Bertran +2 more
2017International Symposium on High-Performance Computer Architecture29 citations
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Resilient, UAV-embedded real-time computing
A. Vega, Chung-Ching Lin, Karthik Swaminathan, A. Buyuktosunoglu +2 more
2015ICCD26 citations
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DyHard-DNN: Even More DNN Acceleration with Dynamic Hardware Reconfiguration
Mateja Putic, A. Buyuktosunoglu, Swagath Venkataramani, P. Bose +2 more
2018Design Automation Conference25 citations
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Robust power management in the IBM z13
Tobias Webel, Preetham Lobo, Ramon Bertran, G. Salem +11 more
2015IBM Journal of Research and Development25 citations
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Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems
Jingwen Leng, A. Buyuktosunoglu, Ramon Bertran, P. Bose +3 more
2020International Symposium on High-Performance Computer Architecture24 citations
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Increasing multicore system efficiency through intelligent bandwidth shifting
Víctor Jiménez, A. Buyuktosunoglu, P. Bose, F. O'Connell +2 more
2015International Symposium on High-Performance Computer Architecture23 citations Open access
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A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC
Tianyu Jia, Paolo Mantovani, Maico Cassel dos Santos, Davide Giri +14 more
2022European Solid-State Circuits Conference22 citations
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Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience)
E. Cheng, S. Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher +7 more
2017IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems19 citations Open access
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14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration
Maico Cassel dos Santos, Tian-Yu Jia, Joseph Zuckerman, Martin Cochet +25 more
2024IEEE International Solid-State Circuits Conference18 citations
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Energy Efficiency Boost in the AI-Infused POWER10 Processor
Brian W. Thompto, Dung Q. Nguyen, J. Moreira, Ramon Bertran +22 more
2021International Symposium on Computer Architecture16 citations
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Machine learning techniques for taming the complexity of modern hardware design
M. Ziegler, Ramon Bertran, A. Buyuktosunoglu, P. Bose
2017IBM Journal of Research and Development16 citations
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NOVIA: A Framework for Discovering Non-Conventional Inline Accelerators
David Trilla, J. Wellman, A. Buyuktosunoglu, P. Bose
2021Micro15 citations
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STOMP: A Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors
A. Vega, Aporva Amarnath, J. Wellman, H. Kassa +5 more
2020arXiv.org14 citations
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Reducing Datacenter Compute Carbon Footprint by Harnessing the Power of Specialization: Principles, Metrics, Challenges and Opportunities
Tamar Eilam, P. Bose, Luca P. Carloni, Asaf Cidon +7 more
2024IEEE transactions on semiconductor manufacturing13 citations Open access
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Impact of Software Approximations on the Resiliency of a Video Summarization System
Radha Venkatagiri, Karthik Swaminathan, Chung-Ching Lin, Liang Wang +3 more
2018Dependable Systems and Networks13 citations
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Resilient mobile cognition: Algorithms, innovations, and architectures
R. Viguier, Chung-Ching Lin, Karthik Swaminathan, A. Vega +7 more
2015ICCD13 citations
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Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles
Aporva Amarnath, Subhankar Pal, H. Kassa, A. Vega +5 more
2021IEEE computer architecture letters11 citations
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(Invited) Cross-Layer Resilience: Challenges, Insights, and the Road Ahead
E. Cheng, Daniel Mueller-Gritschneder, J. Abraham, P. Bose +9 more
2019Design Automation Conference11 citations Open access
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Cross-layer system resilience at affordable power
M. Gupta, J. Rivers, Liang Wang, P. Bose
2014IEEE International Reliability Physics Symposium11 citations
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Efficient Pruning for Machine Learning Under Homomorphic Encryption
Ehud Aharoni, Moran Baruch, P. Bose, A. Buyuktosunoglu +7 more
2022European Symposium on Research in Computer Security9 citations Open access
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Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs
Jingwen Leng, A. Buyuktosunoglu, Ramon Bertran, P. Bose +2 more
2021IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems9 citations Open access
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Intelligent Adaptation of Hardware Knobs for Improving Performance and Power Consumption
Cristobal Ortega, Lluc Alvarez, Marc Casas, Ramon Bertran +4 more
2021IEEE transactions on computers9 citations Open access
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Rugged Embedded Systems: Computing in Harsh Environments
A. Vega, P. Bose, A. Buyuktosunoglu
20169 citations
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Dramaton: A Near-DRAM Accelerator for Large Number Theoretic Transforms
Yongmo Park, Subhankar Pal, Aporva Amarnath, Karthik Swaminathan +3 more
2024IEEE computer architecture letters8 citations
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Secure and Resilient SoCs for Autonomous Vehicles
P. Bose, A. Vega, S. Adve, V. Adve +1 more
20218 citations
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Very Low Voltage (VLV) Design
Ramon Bertran, P. Bose, D. Brooks, Jeff Burns +21 more
2017ICCD8 citations
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Resilience and Real-Time Constrained Energy Optimization in Embedded Processor Systems
Liang Wang, J. Rivers, M. Gupta, A. Vega +3 more
20148 citations
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BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs
Martin Cochet, Karthik Swaminathan, E. Loscalzo, Joseph Zuckerman +9 more
2024International Symposium on Computer Architecture7 citations
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TokenSmart: Distributed, Scalable Power Management in the Many-Core Era
Parth Shah, Ranjal Gautham Shenoy, V. Srinivasan, P. Bose +1 more
2021IEEE computer architecture letters7 citations
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MicroGrad: A Centralized Framework for Workload Cloning and Stress Testing
Gokul Subramanian Ravi, Ramon Bertran, P. Bose, Mikko H. Lipasti
2020IEEE International Symposium on Performance Analysis of Systems and Software7 citations Open access
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Towards “Smarter” Vehicles Through Cloud-Backed Swarm Cognition
A. Vega, A. Buyuktosunoglu, P. Bose
20182018 IEEE Intelligent Vehicles Symposium (IV)7 citations
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Power-efficient embedded processing with resilience and real-time constraints
Liang Wang, A. Vega, A. Buyuktosunoglu, P. Bose +1 more
2015International Symposium on Low Power Electronics and Design7 citations
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Experience report: An application-specific checkpointing technique for minimizing checkpoint corruption
Guan-Peng Li, K. Pattabiraman, Chen-Yong Cher, P. Bose
2015IEEE International Symposium on Software Reliability Engineering7 citations
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HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs
Aporva Amarnath, Subhankar Pal, H. Kassa, A. Vega +5 more
2022arXiv.org6 citations Open access
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Adaptive Prefetching on POWER7
Víctor Jiménez, F. Cazorla, R. Gioiosa, A. Buyuktosunoglu +3 more
2014ACM Transactions on Parallel Computing6 citations
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FHENDI: A Near-DRAM Accelerator for Compiler-Generated Fully Homomorphic Encryption Applications
Yongmo Park, Aporva Amarnath, Subhankar Pal, Karthik Swaminathan +7 more
2025International Symposium on High-Performance Computer Architecture5 citations
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Characterizing the Sensitivity to Individual Bit Flips in Client-Side Operations of the CKKS Scheme
Matías Mazzanti, Augusto Vega, P. Bose, Esteban Mocskos
2025arXiv.org5 citations
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