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Chun-Jung Su · SciRah

Researcher profile · Semantic Scholar

Chun-Jung Su

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Chun-Jung Su — researcher profile on SciRah

h-index: 23
Works: 94
Citations: 1,997

Most-cited papers

Steep-slope hysteresis-free negative capacitance MoS2 transistors
M. Si, Chun-Jung Su, Chunsheng Jiang, N. Conrad +7 more
2017Nature Nanotechnology492 citations Open access
Semantic Scholar
Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels
Chun-Jung Su, Tzu-I Tsai, Y. Liou, Zer-Ming Lin +2 more
2011IEEE Electron Device Letters197 citations
Semantic Scholar
Novel poly-silicon nanowire field effect transistor for biosensing application.
Cheng-Yun Hsiao, Chih-Heng Lin, Cheng-Hsiung Hung, Chun-Jung Su +6 more
2009Biosensors & bioelectronics108 citations
Semantic Scholar
First Demonstration of CMOS Inverter and 6T-SRAM Based on GAA CFETs Structure for 3D-IC Applications
Sun-Yran Chang, J.-H. Li, M.-K. Huang, Yao-Ming Huang +32 more
2019International Electron Devices Meeting74 citations
Semantic Scholar
Ultrasensitive detection of dopamine using a polysilicon nanowire field-effect transistor.
Chih-Heng Lin, Cheng-Yun Hsiao, Cheng-Hsiung Hung, Yen-Ren Lo +6 more
2008Chemical Communications69 citations
Semantic Scholar
Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET
Shi-Xian Guan, Ti-Lo H. Yang, Chih-Hao Yang, Chuan-Jie Hong +8 more
2023npj 2D Materials and Applications65 citations Open access
Semantic Scholar
Uniform Crystal Formation and Electrical Variability Reduction in Hafnium-Oxide-Based Ferroelectric Memory by Thermal Engineering
S. De, Bo-Han Qiu, Wei-Xuan Bu, M. A. Baig +4 more
202152 citations
Semantic Scholar
Fabrication of Vertically Stacked Nanosheet Junctionless Field-Effect Transistors and Applications for the CMOS and CFET Inverters
P. Sung, Shu-Wei Chang, K. Kao, Chien-Ting Wu +6 more
2020IEEE Transactions on Electron Devices49 citations
Semantic Scholar
Reliability Mechanisms of LTPS-TFT With $\hbox{HfO}_{2}$ Gate Dielectric: PBTI, NBTI, and Hot-Carrier Stress
Ming-Wen Ma, Chih-Yang Chen, Woei-Cherng Wu, Chun-Jung Su +3 more
2008IEEE Transactions on Electron Devices48 citations
Semantic Scholar
Demonstration of Highly Robust 5 nm Hf0.5Zr0.5O₂ Ultra-Thin Ferroelectric Capacitor by Improving Interface Quality
Yan-Kui Liang, Jui-Sheng Wu, Chih-Yu Teng, Hua-Lun Ko +4 more
2021IEEE Electron Device Letters44 citations
Semantic Scholar
Role of electrode-induced oxygen vacancies in regulating polarization wake-up in ferroelectric capacitors
Yi-Jan Lin, Chih-Yu Teng, Shu-Jui Chang, Yen-Fa Liao +3 more
202041 citations
Semantic Scholar
High-Performance Poly-Si Nanowire NMOS Transistors
Horng-Chih Lin, Chun-Jung Su
2007IEEE transactions on nanotechnology40 citations
Semantic Scholar
Sub-60 mV/dec ferroelectric HZO MoS2 negative capacitance field-effect transistor with internal metal gate: The role of parasitic capacitance
M. Si, Chunsheng Jiang, Chun-Jung Su, Y.-T. Tang +4 more
2017International Electron Devices Meeting39 citations
Semantic Scholar
Subthreshold Swing Saturation of Nanoscale MOSFETs Due to Source-to-Drain Tunneling at Cryogenic Temperatures
K. Kao, Tzung-Rang Wu, Hong-lin Chen, Wen-Jay Lee +4 more
2020IEEE Electron Device Letters37 citations
Semantic Scholar
Fabrication and characterization of nanowire transistors with solid-phase crystallized poly-Si channels
Horng-Chih Lin, Ming-Hsien Lee, Chun-Jung Su, Shih-Wen Shen
2006IEEE Transactions on Electron Devices37 citations
Semantic Scholar
On the thickness dependence of the polarization switching kinetics in HfO2-based ferroelectric
Yoshiki Sawabe, T. Saraya, T. Hiramoto, Chun-Jung Su +2 more
2022Applied Physics Letters36 citations Open access
Semantic Scholar
Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications
S. De, M. Baig, Bo-Han Qiu, F. Müller +8 more
2022Frontiers in Nanotechnology35 citations Open access
Semantic Scholar
First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3-D Integration With Dual Work Function Gate for Ultralow-Power SRAM and RF Applications
Shu-Wei Chang, Tsung-Han Lu, Cong Yang, Cheng-Jui Yeh +37 more
2022IEEE Transactions on Electron Devices34 citations
Semantic Scholar
Effects of Annealing on Ferroelectric Hafnium–Zirconium–Oxide-Based Transistor Technology
Yi-Hsuan Chen, Chun-Jung Su, C. Hu, Tian-Li Wu
2019IEEE Electron Device Letters32 citations
Semantic Scholar
Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION
Chun-Jung Su, Y.-T. Tang, Y.-C. Tsou, P. Sung +26 more
2017Symposium on VLSI Technology29 citations
Semantic Scholar
Improved TDDB Reliability and Interface States in 5-nm Hf0.5Zr0.5O2 Ferroelectric Technologies Using NH3 Plasma and Microwave Annealing
Yi-Hsuan Chen, Chun-Jung Su, Ting-Hsin Yang, C. Hu +1 more
2020IEEE Transactions on Electron Devices27 citations
Semantic Scholar
Local Modulation of Electrical Transport in 2D Layered Materials Induced by Electron Beam Irradiation
Chih-Pin Lin, Po-Chun Chen, Jyun-Hong Huang, Ching-Ting Lin +6 more
2019ACS Applied Electronic Materials24 citations
Semantic Scholar
Ge nanowire FETs with HfZrOx ferroelectric gate stack exhibiting SS of sub-60 mV/dec and biasing effects on ferroelectric reliability
Chun-Jung Su, T. Hong, Y.-C. Tsou, Fu-Ju Hou +21 more
2017International Electron Devices Meeting24 citations
Semantic Scholar
Robust Binary Neural Network Operation From 233 K to 398 K via Gate Stack and Bias Optimization of Ferroelectric FinFET Synapses
S. De, Hoang-Hiep Le, Bo-Han Qiu, M. Baig +4 more
2021IEEE Electron Device Letters22 citations Open access
Semantic Scholar
A Novel Multiple-Gate Polycrystalline Silicon Nanowire Transistor Featuring an Inverse-T Gate
Horng-Chih Lin, Hsing-Hui Hsu, Chun-Jung Su, Tiao-Yuan Huang
2008IEEE Electron Device Letters21 citations
Semantic Scholar
Effective N-methyl-2-pyrrolidone wet cleaning for fabricating high-performance monolayer MoS2 transistors
Po-Chun Chen, Chih-Pin Lin, Chuan-Jie Hong, Chih-Hao Yang +9 more
2018Nano Reseach19 citations
Semantic Scholar
A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires
Chun-Jung Su, Tuan-Kai Su, Tzu-I Tsai, Horng-Chih Lin +1 more
2012Nanoscale Research Letters17 citations Open access
Semantic Scholar
Impacts of surface nitridation on crystalline ferroelectric phase of Hf1-xZrxO2 and ferroelectric FET performance
Yi-Jan Lin, Chih-Yu Teng, Chen-Ming Hu, Chun-Jung Su +1 more
2021Applied Physics Letters16 citations
Semantic Scholar
First Demonstration of heterogenous Complementary FETs utilizing Low-Temperature (200 °C) Hetero-Layers Bonding Technique (LT-HBT)
Taeeun Hong, W. Chang, A. Agarwal, Y.-T. Huang +40 more
2020International Electron Devices Meeting16 citations
Semantic Scholar
Tri-Gate Ferroelectric FET Characterization and Modelling for Online Training of Neural Networks at Room Temperature and 233K
S. De, M. Baig, Bo-Han Qiu, D. Lu +4 more
2020Device Research Conference15 citations
Semantic Scholar
Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications
P. Sung, Che-Chia Chang, L. Chen, K. Kao +31 more
2018International Electron Devices Meeting15 citations
Semantic Scholar
Characteristics of PBTI and Hot Carrier Stress for LTPS-TFT With High- $\kappa$ Gate Dielectric
Ming-Wen Ma, Chih-Yang Chen, Chun-Jung Su, Woei-Cherng Wu +4 more
2008IEEE Electron Device Letters15 citations
Semantic Scholar
Water passivation effect on polycrystalline silicon nanowires
Horng-Chih Lin, Chun-Jung Su, Cheng-Yun Hsiao, Yuh-Shyong Yang +1 more
200715 citations
Semantic Scholar
Effects of Forming Gas Annealing and Channel Dimensions on the Electrical Characteristics of FeFETs and CMOS Inverter
P. Sung, Chun-Jung Su, S. Lo, F. Hsueh +3 more
2020IEEE Journal of the Electron Devices Society14 citations Open access
Semantic Scholar
Operation of a Novel Device With Suspended Nanowire Channels
Horng-Chih Lin, Chia-Hao Kuo, Guan-Jang Li, Chun-Jung Su +1 more
2010IEEE Electron Device Letters14 citations
Semantic Scholar
3-D Monolithic Stacking of Complementary-FET on CMOS for Next Generation Compute-In-Memory SRAM
M. Baig, Cheng-Jui Yeh, Shu-Wei Chang, Bo-Han Qiu +12 more
2023IEEE Journal of the Electron Devices Society11 citations Open access
Semantic Scholar
A Comprehensive Kinetical Modeling of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Energy Effects on Negative Capacitance FETs
Y.-T. Tang, Che-Lun Fan, Ya-Chen Kao, N. Módolo +12 more
2019Symposium on VLSI Technology10 citations
Semantic Scholar
A Comprehensive Study of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Layer Effects on Negative Capacitance FETs for Sub-5 nm Node
Y.-T. Tang, Chun-Jung Su, Y.-S. Wang, K. Kao +11 more
20182018 IEEE Symposium on VLSI Technology10 citations
Semantic Scholar
Ge FinFET CMOS Inverters with Improved Channel Surface Roughness by Using In-situ ALD Digital O3 Treatment
M. Yeh, G. Luo, Fu-Ju Hou, P. Sung +15 more
2018IEEE Electron Devices Technology and Manufacturing Conference10 citations Open access
Semantic Scholar
Critical Role of GIDL Current for Erase Operation in 3D Vertical FeFET and Compact Long-term FeFET Retention Model
Fei Mo, Jiawen Xiang, Xiaoran Mei, Yoshiki Sawabe +5 more
2021Symposium on VLSI Technology9 citations
Semantic Scholar
Impacts of Multiple-Gated Configuration on the Characteristics of Poly-Si Nanowire SONOS Devices
Hsing-Hui Hsu, Horng-Chih Lin, Cheng-wei Luo, Chun-Jung Su +1 more
2011IEEE Transactions on Electron Devices9 citations
Semantic Scholar
High performance complementary Ge peaking FinFETs by room temperature neutral beam oxidation for sub-7 nm technology node applications
Yao-Jen Lee, T. Hong, F. Hsueh, P. Sung +26 more
2016International Electron Devices Meeting7 citations
Semantic Scholar
Characterizations of polycrystalline silicon nanowire thin-film transistors enhanced by metal-induced lateral crystallization
Chun-Jung Su, Yu-Feng Huang, Horng-Chih Lin, Tiao-Yuan Huang
20127 citations
Semantic Scholar
Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique
Chun-Jung Su, Tzu-I Tsai, Horng-Chih Lin, Tiao-Yuan Huang +1 more
2012Nanoscale Research Letters7 citations Open access
Semantic Scholar
Efficient Erase Operation by GIDL Current for 3D Structure FeFETs With Gate Stack Engineering and Compact Long-Term Retention Model
Fei Mo, Jiawen Xiang, Xiaoran Mei, Yoshiki Sawabe +5 more
2022IEEE Journal of the Electron Devices Society6 citations Open access
Semantic Scholar
3D Integration of Vertical-Stacking of MoS2 and Si CMOS Featuring Embedded 2T1R Configuration Demonstrated on Full Wafers
Chun-Jung Su, M.-K. Huang, K. S. Lee, V.-P.-H. Hu +19 more
2020International Electron Devices Meeting6 citations
Semantic Scholar
Impacts of Fluorine Ion Implantation With Low-Temperature Solid-Phase Crystallized Activation on High- $\kappa$ LTPS-TFT
Ming-Wen Ma, Chih-Yang Chen, Chun-Jung Su, Woei-Cherng Wu +5 more
2008IEEE Electron Device Letters6 citations
Semantic Scholar
First Demonstration of Ferroelectric Tunnel Thin-Film Transistor Nonvolatile Memory With Polycrystalline-Silicon Channel and HfZrO Gate Dielectric
William Cheng-Yu Ma, Chun-Jung Su, K. Kao, Yao-Jen Lee +9 more
2022IEEE Transactions on Electron Devices5 citations
Semantic Scholar
Demonstration of synaptic characteristics of polycrystalline-silicon ferroelectric thin-film transistor for application of neuromorphic computing
William Cheng-Yu Ma, Chun-Jung Su, Yao-Jen Lee, K. Kao +5 more
2022Semiconductor Science and Technology5 citations
Semantic Scholar
Nonvolatile molecular memory with the multilevel states based on MoS2 nanochannel field effect transistor through tuning gate voltage to control molecular configurations
Yann-Wen Lan, Chuan-Jie Hong, Po-Chun Chen, Yun-Yan Lin +9 more
2020Nanotechnology5 citations Open access
Semantic Scholar

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