F. Marc

Most-cited papers

Reliability-Aware Circuit Design Methodology for Beyond-5G Communication Systems
C. Mukherjee, B. Ardouin, J. Dupuy, V. Nodjiadjim +4 more
2017IEEE transactions on device and materials reliability25 citations
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Statistical analysis during the reliability simulation
C. Bestory, F. Marc, H. Levi
2007Microelectronics and reliability25 citations
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Improvement of aging simulation of electronic circuits using behavioral modeling
F. Marc, Benoît Mongellaz, Corinne Bestory, H. Levi +1 more
2006IEEE transactions on device and materials reliability22 citations
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Design and implementation of a low cost test bench to assess the reliability of FPGA
M. Naouss, F. Marc
2015Microelectronics and reliability20 citations
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Ultrasonic images interpretation improvement for microassembling technologies characterisation
L. Béchou, Y. Ousten, B. Tregon, F. Marc +3 more
199716 citations
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Modelling delay degradation due to NBTI in FPGA Look-up tables
M. Naouss, F. Marc
2016International Conference on Field-Programmable Logic and Applications15 citations
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FPGA LUT delay degradation due to HCI: Experiment and simulation results
M. Naouss, F. Marc
2016Microelectronics and reliability13 citations
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Advancements on reliability-aware analog circuit design
B. Ardouin, J. Dupuy, J. Godin, V. Nodjiadjim +6 more
2012European Solid-State Device Research Conference12 citations
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Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design
Sudip Ghosh, B. Grandchamp, G. A. Koné, F. Marc +6 more
2011Microelectronics and reliability12 citations
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Reliability of submicron InGaAs/InP DHBT under thermal and electrical stresses
G. A. Koné, B. Grandchamp, C. Hainaut, F. Marc +6 more
2011Microelectronics and reliability11 citations
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Preliminary results of storage accelerated aging test on InP/GaAsSb DHBT
G. A. Koné, Sudip Ghosh, B. Grandchamp, C. Maneux +6 more
2010International Conference on Indium Phosphide and Related Materials11 citations
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Submicrometer InP/InGaAs DHBT Architecture Enhancements Targeting Reliability Improvements
Gilles A. Kone, B. Grandchamp, Cyril Hainaut, F. Marc +7 more
2013IEEE Transactions on Electron Devices10 citations
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Thermal aging model of InP/InGaAs/InP DHBT
Sudip Ghosh, F. Marc, C. Maneux, B. Grandchamp +2 more
2010Microelectronics and reliability10 citations
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A physical and versatile aging compact model for hot carrier degradation in SiGe HBTs under dynamic operating conditions
C. Mukherjee, F. Marc, M. Couret, G. Fischer +5 more
20208 citations Open access
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High Level Power and Energy Exploration Using ArchC
Tushar Gupta, C. Bertolini, O. Héron, N. Ventroux +2 more
20102010 22nd International Symposium on Computer Architecture and High Performance Computing8 citations
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Contribution to ageing simulation of complex analogue circuit using VHDL-AMS behavioural modelling language
Benoit Mongellaz, F. Marc, N. Milet-Lewis, Y. Danto
2002Microelectronics and reliability7 citations
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Investigation of CMOS reliability in 28 nm through BTI and HCI extraction
Julien Coutet, F. Marc, J. Clement
2023Microelectronics and reliability6 citations Open access
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Simulation and modelling of long term reliability of digital circuits implemented in FPGA
Jorgue Daniel Aguirre Morales, F. Marc, A. Bensoussan, A. Durier
2018Microelectronics and reliability6 citations
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Influence of temperature of storage, write and read operations on multiple level cells NAND flash memories
Julien Coutet, F. Marc, Flavien Dozolme, Romain Guétard +4 more
2018Microelectronics and reliability6 citations
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A unified aging compact model for hot carrier degradation under mixed-mode and reverse E-B stress in complementary SiGe HBTs
C. Mukherjee, G. Fischer, F. Marc, M. Couret +2 more
20205 citations Open access
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Multiscaled Simulation Methodology for Neuro-Inspired Circuits Demonstrated with an Organic Memristor
Christopher H. Bennett, J. Lorival, F. Marc, Théo Cabaret +4 more
2018IEEE Transactions on Multi-Scale Computing Systems5 citations
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Relation between HCI-induced performance degradation and applications in a RISC processor
C. Bertolini, O. Héron, N. Ventroux, F. Marc
2012IEEE International Symposium on On-Line Testing and Robust System Design5 citations
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Fault and diagnosis on a successive approximation ADC
F. Marc, Dominique Dallet, Yves Danto
1997IEEE Instrumentation and Measurement Technology Conference Sensing, Processing, Networking. IMTC Proceedings5 citations
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Development of a high accuracy and stability test bench for ageing measurement of 16 nm FinFETs based FPGA
J. Sobas, T. Airimitoaie, F. Marc
2022Microelectronics and reliability4 citations Open access
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3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model
A. Poittevin, C. Mukherjee, I. O'Connor, C. Maneux +7 more
2020IEEE/IFIP International Conference on Very Large Scale Integration of System-on-Chip4 citations Open access
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Impact of Power Consumption and Temperature on Processor Lifetime Reliability
Tushar Gupta, C. Bertolini, O. Héron, N. Ventroux +2 more
2012Journal of Low Power Electronics4 citations
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Effects of various applications on relative lifetime of processor cores
Tushar Gupta, C. Bertolini, O. Héron, Nicolas Ventroux +2 more
2009IEEE International Integrated Reliability Workshop Final Report4 citations
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A general methodology using an electron beam tester applied to failure localization inside a logic integrated circuit
F. Marc, H. Frémont, P. Jounet, M. Barré +1 more
19954 citations
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Scalable compact modeling of trap generation near the EB spacer oxide interface in SiGe HBTs
M. Couret, Mathieu Jaoul, F. Marc, C. Mukherjee +3 more
2020Solid-State Electronics3 citations Open access
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RAAPS: Reliability Aware ArchC based Processor Simulator
Tushar Gupta, C. Bertolini, O. Héron, Nicolas Ventroux +2 more
2010IEEE International Integrated Reliability Workshop Final Report3 citations
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Benchmarking of HBT models for InP based DHBT modeling
S. Ghosh, T. Zimmer, B. Ardouin, C. Maneux +4 more
20102010 27th International Conference on Microelectronics Proceedings3 citations
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Electrical aging behavioral modeling for reliability analyses of ionizing dose effects on an n-MOS simple current mirror
C. Bestory, F. Marc, S. Duzellier, H. Levi
2009Microelectronics and reliability3 citations
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Electro-Thermal Limitations and Device Degradation of SiGe HBTs with Emphasis on Circuit Performance
S. Frégonèse, C. Mukherjee, H. Rücker, P. Chevalier +7 more
2021BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium2 citations Open access
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Long term accelerated ageing of an ASIC dedicated to cryptographic application
Julien Coutet, Emmanuel Doche, Romain Guétard, Aurélien Janvresse +7 more
2019Microelectronics and reliability2 citations Open access
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Impact of SiGe HBT hot-carrier degradation on the broadband amplifier output supply current
M. Couret, G. Fischer, Iria Garcia-Lopez, M. de Matos +2 more
2019European Solid-State Device Research Conference2 citations
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On the Simulation of HCI-Induced Variations of IC Timings at High Level
O. Héron, C. Bertolini, C. Sandionigi, N. Ventroux +1 more
2013Journal of electronic testing2 citations
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Reliability of submicron InGaAs/InP DHBT on Accelerated Aging Tests under Thermal and Electrical stresses
G. A. Koné, B. Grandchamp, C. Hainaut, F. Marc +6 more
20112 citations
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Proceedings of 24th European Symposium on the Reliability of Electron Devices, Failure Physics and Analysis - ESREF 2013 (Special issue of Microelectronics Reliability, Vol. 53, Issues 9-11) (2013)
N. Labat, F. Marc
20072 citations
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Multi-level Modeling of Hot Carrier Injection for Reliability
C. Bestory, F. Marc, H. Levi, Y. Danto
2006Forum on Specification and Design Languages2 citations
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Reliability of Low-Cost PCB Interconnections for Telecommunication Applications
G. Duchamp, F. Verdier, Y. Deshayes, F. Marc +2 more
2004Microelectronics and reliability2 citations
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Reliability simulation of electronic circuits with VHDL-AMS
F. Marc, Benoit Mongellaz, Y. Danto
2003Forum on Specification and Design Languages2 citations
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A statistical study into reliability of FPGA implemented circuits: Simulation and modelling
J. Aguirre-Morales, F. Marc
20211 citations
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Proceedings of the 30th European Symposium on the reliability of electron devices, failure physics and analysis
N. Nolhier, N. Labat, H. Frémont, F. Marc +2 more
20191 citations
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Microelectronics Reliability Volume 55, Issues 9–10
P. Perdu, F. Marc, M. Bafleur, H. Frémont +1 more
20151 citations
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System Level Analysis and Accurate Prediction of Electromigration
Tushar Gupta, C. Bertolini, O. Héron, N. Ventroux +2 more
20111 citations
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Predicting Lifetime using power consumption from 'Wattch'
Tushar Gupta, C. Bertolini, O. Héron, N. Ventroux +2 more
20101 citations
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Reliability Aware ArchC based Processor Simulator
Tushar Gupta, C. Bertolini, O. Héron, N. Ventroux +2 more
20101 citations
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Ageing simulation of MOSFET circuit using a VHDL-AMS behavioural modelling: an experimental case study
Benoit Mongellaz, F. Marc, Y. Danto
2003Microelectronics and reliability1 citations
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New methodology for localizing faults in programmable and commercial circuits
R. Desplats, P. Perdu, F. Marc, Y. Danto +1 more
19971 citations
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Quick and exhaustive descrambling methodology for high-density static random access memories using voltage contrast
F. Marc, H. Frémont, P. Jounet, Y. Danto
19941 citations
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