H. Harrer

Most-cited papers

Discrete time cellular neural networks
H. Harrer, J. Nossek
1992International journal of circuit theory and applications266 citations
Semantic Scholar
An analog implementation of discrete-time cellular neural networks
H. Harrer, J. Nossek, Rudolf Stelzl
1992IEEE Trans. Neural Networks138 citations
Semantic Scholar
Multiple layer discrete-time cellular neural networks using time-variant templates
H. Harrer
199349 citations
Semantic Scholar
A current-mode DTCNN universal chip
H. Harrer, J. Nossek, T. Roska, L. Chua
1994International Symposium on Circuits and Systems46 citations
Semantic Scholar
Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module
J. Warnock, Y. Chan, H. Harrer, S. Carey +21 more
2014IEEE Journal of Solid-State Circuits29 citations
Semantic Scholar
Functional high-speed characterization and modeling of a six-layer copper wiring structure and performance comparison with aluminum on-chip interconnections
A. Deutsch, H. Harrer, C. Surovic, G. Hellner +8 more
1998International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)27 citations
Semantic Scholar
First- and second-level packaging of the z990 processor cage
T. Winkel, W. Becker, H. Harrer, Harald Pross +4 more
2004IBM Journal of Research and Development18 citations
Semantic Scholar
IBM Telum: a 16-Core 5+ GHz DCM
O. Geva, C. Berry, R. Sonnelitter, D. Wolpert +20 more
2022IEEE International Solid-State Circuits Conference17 citations
Semantic Scholar
Electronic packaging of the IBM z13 processor drawer
W. Becker, H. Harrer, A. Huber, William L. Brodsky +5 more
2015IBM Journal of Research and Development17 citations
Semantic Scholar
Analysis and Mitigation of Parasitic Mode Conversion for Microstrip to Stripline Transitions
R. Rímolo-Donadío, J. Supper, T. Winkel, H. Harrer +1 more
2012IEEE transactions on electromagnetic compatibility (Print)17 citations
Semantic Scholar
First-and Second-level Packaging for the Ibm Eserver Z900
H. Harrer, Bruce J. Chamberlin
200217 citations
Semantic Scholar
5.5GHz system z microprocessor and multi-chip module
J. Warnock, Y. Chan, H. Harrer, D. L. Rude +19 more
20132013 IEEE International Solid-State Circuits Conference Digest of Technical Papers16 citations
Semantic Scholar
Skeletonization: a new application for discrete-time cellular neural networks using time-variant templates
H. Harrer, J. Nossek
1992[Proceedings] 1992 IEEE International Symposium on Circuits and Systems16 citations
Semantic Scholar
Crosstalk analysis in high density connector via pin fields for digital backplane applications using a 12-port vector network analyzer
M. Kotzev, R. Frech, H. Harrer, Dierk Kaller +4 more
20103rd Electronics System Integration Technology Conference ESTC15 citations
Semantic Scholar
Electronic packaging of the IBM System z196 enterprise-class server processor cage
T. Strach, F. E. Bosco, K. Christian, Kevin R. Covi +13 more
2012IBM Journal of Research and Development11 citations
Semantic Scholar
Thermal power plane enabling dual-side electrical interconnects for high-performance chip stacks: Concept
T. Brunschwiler, R. Heller, G. Schlottig, T. Tick +5 more
2014Electronics System-integration Technology Conference8 citations
Semantic Scholar
High-speed interconnect and packaging design of the IBM System z9 processor cage
H. Harrer, D. Dreps, T. Winkel, W. Scholz +5 more
2007IBM Journal of Research and Development8 citations
Semantic Scholar
Methods for calculation of eye diagrams for digital links with multiple aggressors having unknown time offsets
Dion Timmermann, R. Rímolo-Donadío, Y. Kwark, T. Winkel +3 more
2012Workshop on Signal Propagation on Interconnects6 citations
Semantic Scholar
T-Rex, a blade packaging architecture for mainframe servers
G. Katopis, W. Becker, H. Harrer
2003IEEE Transactions on Advanced Packaging6 citations
Semantic Scholar
Packaging design challenges of the IBM System z10 Enterprise Class server
T. Winkel, H. Harrer, Dierk Kaller, J. Supper +7 more
2009IBM Journal of Research and Development5 citations
Semantic Scholar
T-REX, a blade packaging architecture for mainframe servers
G. Katopis, W. Becker, H. Harrer
2003Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)5 citations
Semantic Scholar
Framework for co-simulation of signal and power integrity in server systems
T. Winkel, H. Harrer, T. Strach, R. Rímolo-Donadío +3 more
20122012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems4 citations
Semantic Scholar
Hardware Verification of Via Crosstalk Cancellation for Differential BGA-to-BGA Links
K. Scharff, Xiaomin Duan, M. Cocchini, Hung Nguyen +3 more
20222022 IEEE 31st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)3 citations
Semantic Scholar
On the convergence of discrete-time neural networks
H. Harrer, Z. Galias, J. Nossek
1993International journal of circuit theory and applications3 citations
Semantic Scholar
Fast parametric pre-layout analysis of signal integrity for backplane interconnects
R. Rímolo-Donadío, T. Winkel, C. Siviero, Dierk Kaller +3 more
2011Workshop on Signal Propagation on Interconnects2 citations
Semantic Scholar
Feature - From chips to systems via packaging - A comparison of IBM's mainframe servers
H. Harrer, G. Katopis, W. Becker
2006IEEE Circuits and Systems Magazine2 citations
Semantic Scholar
A flexible PC-controlled analog/digital test set for CNNs
I. Kohn, B. Smith, H. Harrer, J. Nossek
1992CNNA '92 Proceedings Second International Workshop on Cellular Neural Networks and Their Applications2 citations
Semantic Scholar
Routing Length Impact on Differential Via Crosstalk Cancellation
Nicole Selezinski, Xiaomin Duan, K. Scharff, Dierk Kaller +1 more
2023Workshop on Signal Propagation on Interconnects1 citations
Semantic Scholar
Adjacent line coupling for long off chip interconnects
H. Harrer, Dierk Kaller, Erich Klink
1997Electrical Performance of Electronic Packaging1 citations
Semantic Scholar
Circuit breaker and method for its operation
Fabio Pafumi, Thomas Regahl, M. Naumann, P. Meckler +2 more
20150 citations
Semantic Scholar
In the heat sink built-in power supply and power distribution circuit for integrated circuits as well as 3-D VLSI device, data processing system and method thus
H. Barowski, H. Harrer, J. Supper, B. Michel +4 more
20110 citations
Semantic Scholar
In the heat sink integrated power supply and power distribution for integrated circuits
H. Barowski, H. Harrer, J. Supper, B. Michel +4 more
20110 citations
Semantic Scholar
First- and second-level packaging for the IBM eServer z900
H. Harrer, Harald Pross, T. Winkel, W. Becker +5 more
2002IBM Journal of Research and Development0 citations
Semantic Scholar
Multi drop net topologies for MCM off chip interconnection lines
Dierk Kaller, H. Harrer, S. Boehringer, G. Katopis
1998IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370)0 citations
Semantic Scholar
A locking device for. As for household appliances doors
H. Baader, H. Harrer, Günther Hengelein
19980 citations
Semantic Scholar
et Topologies for MCM Off Chip Interconnectio
Dierk Kaller, H. Harrer, S. Boehringer, G. Katopis
19980 citations
Semantic Scholar
Measurement results of the DTCNN-universal chip
H. Harrer, J. Nossek, T. Roska, L. O. Chua
1994Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems0 citations
Semantic Scholar