A. Amirkhany

Most-cited papers

A 12-GS/s Phase-Calibrated CMOS Digital-to-Analog Converter for Backplane Communications
J. Savoj, A. Abbasfar, A. Amirkhany, M. Jeeradit +1 more
2008IEEE Journal of Solid-State Circuits44 citations
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A 24 Gb/s Software Programmable Analog Multi-Tone Transmitter
A. Amirkhany, A. Abbasfar, J. Savoj, M. Jeeradit +4 more
2008IEEE Journal of Solid-State Circuits40 citations
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Optimal linear precoding with theoretical and practical data rates in high-speed serial-link backplane communication
V. Stojanović, A. Amirkhany, M. Horowitz
2004IEEE International Conference on Communications32 citations
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A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface
A. Amirkhany, Jason Wei, N. K. Mishra, Jie Shen +28 more
2012IEEE Journal of Solid-State Circuits26 citations
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A 24Gb/s Software Programmable Multi-Channel Transmitter
A. Amirkhany, A. Abbasfar, J. Savoj, M. Jeeradit +3 more
20072007 IEEE Symposium on VLSI Circuits23 citations
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A New Technique for Characterization of Digital-to-Analog Converters in High-Speed Systems
J. Savoj, A. Abbasfar, A. Amirkhany, B. Garlepp +1 more
20072007 Design, Automation & Test in Europe Conference & Exhibition22 citations
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A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration
K. Kaviani, A. Amirkhany, Charlie Huang, Phuong Le +7 more
2012IEEE International Solid-State Circuits Conference20 citations
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Multi-tone signaling for high-speed backplane electrical links
A. Amirkhany, V. Stojanović, M. Horowitz
2004IEEE Global Telecommunications Conference, 2004. GLOBECOM '04.20 citations
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A 0.94mW/Gb/s 22Gb/s 2-tap partial-response DFE receiver in 40nm LP CMOS
Kwangmo Jung, A. Amirkhany, K. Kaviani
20132013 IEEE International Solid-State Circuits Conference Digest of Technical Papers19 citations
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A Low-Cost Resonance Mitigation Technique for Multidrop Memory Interfaces
F. Aryanfar, A. Amirkhany
2010IEEE Transactions on Circuits and Systems - II - Express Briefs19 citations
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A 0.4-mW/Gb/s Near-Ground Receiver Front-End With Replica Transconductance Termination Calibration for a 16-Gb/s Source-Series Terminated Transceiver
K. Kaviani, A. Amirkhany, Charlie Huang, Phuong Le +7 more
2013IEEE Journal of Solid-State Circuits17 citations
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SPC03-5: Analog Multi-Tone Signaling for High-Speed Backplane Electrical Links
A. Amirkhany, A. Abbasfar, V. Stojanović, M. Horowitz
2006IEEE Globecom 200617 citations
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A 4.1-pJ/b, 16-Gb/s Coded Differential Bidirectional Parallel Electrical Link
A. Amirkhany, K. Kaviani, A. Abbasfar, Shuaeb Fazeel +5 more
2012IEEE Journal of Solid-State Circuits16 citations
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Basics of Clock and Data Recovery Circuits: Exploring High-Speed Serial Links
A. Amirkhany
2020IEEE Solid-State Circuits Magazine14 citations
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A 5.2 Gb/s Receiver for Next-Generation 8K Displays in 180 nm CMOS Process
Tianyu Wang, Da Wei, Ranick Ng, Gaurav Malhotra +3 more
2022IEEE Journal of Solid-State Circuits13 citations Open access
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23.3 A 6Gb/s 3-tap FFE transmitter and 5-tap DFE receiver in 65nm/0.18µm CMOS for next-generation 8K displays
M. Hekmat, Sanquan Song, Nancy Jaffari, S. Sankaranarayanan +6 more
2016IEEE International Solid-State Circuits Conference13 citations
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A 5 Gbps 0.13 $\mu$m CMOS Pilot-Based Clock and Data Recovery Scheme for High-Speed Links
Mahmoud Reza Ahmadi, A. Amirkhany, R. Harjani
2009IEEE Journal of Solid-State Circuits10 citations
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Statistical simulation of SSO noise in multi-gigabit systems
W. Beyene, A. Amirkhany, A. Abbasfar
20092009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems10 citations
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Practical Limits of Multi-Tone Signaling Over High-Speed Backplane Electrical Links
A. Amirkhany, A. Abbasfar, V. Stojanović, M. Horowitz
2007IEEE International Conference on Communications9 citations
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A 5Gbps 0.13μm CMOS pilot-based clock and data recovery scheme for high-speed links
Mahmoud Reza Ahmadi, A. Amirkhany, R. Harjani
2010IEEE Custom Integrated Circuits Conference8 citations
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A 4.1pJ/b 16Gb/s coded differential bidirectional parallel electrical link
A. Amirkhany, K. Kaviani, A. Abbasfar, F. Shuaeb +5 more
2012IEEE International Solid-State Circuits Conference7 citations
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On overcoming the limitations of single-ended signaling for graphics memory interfaces
A. Amirkhany, Wendem Beyene, C. Madden, A. Abbasfar +5 more
2011IEEE Asian Solid-State Circuits Conference 20117 citations
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Power-efficient I/O design considerations for high-bandwidth applications
J. Eble, Scott Best, B. Leibowitz, Lei Luo +5 more
2011IEEE Custom Integrated Circuits Conference5 citations
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Controlled Intersymbol Interference Design Techniques of Conventional Interconnect Systems for Data Rates Beyond 20 Gbps
W. Beyene, A. Amirkhany
2008IEEE Transactions on Advanced Packaging5 citations Open access
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Time-Variant Characterization and Compensation of Wideband Circuits
A. Amirkhany, A. Abbasfar, J. Savoj, M. Horowitz
2007IEEE Custom Integrated Circuits Conference5 citations
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9‐5L: Late‐News Paper: 6Gb/s Ultra Definition Display Interface (UDDI) for Large‐size 8K Displays
A. Amirkhany, M. Hekmat, S. Sankaranarayanan, P. JoseAnup +9 more
20173 citations
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An enhanced power integrity analysis flow based on the interdependence between simultaneous switching output noise and static IR drop
Minghui Han, A. Amirkhany, Wei Xiong
2014Electronic Components and Technology Conference3 citations
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An output structure for a bi-modal 6.4-Gbps GDDR5 and 2.4-Gbps DDR3 compatible memory interface
N. K. Mishra, Manish Jain, Phuong Le, S. Mukherjee +2 more
2011IEEE Custom Integrated Circuits Conference3 citations
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Introduction to the Special Section on the 2021 IEEE International Solid-State Circuits Conference (ISSCC)
A. Amirkhany, T. Karnik, Shidhartha Das, Jun Deguchi +1 more
2022IEEE J. Solid State Circuits2 citations Open access
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15‐2: A 6.0Gbps Clock Embedded Interface for Advanced Mobile Displays
Dong-Su Park, Jongman Bae, Hyun-su Kim, A. Amirkhany +5 more
2022SID Symposium Digest of Technical Papers0 citations
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Baud rate pattern-adaptable dual loop clock recovery for high speed serial links
Gaurav Malhotra, Jalil Kamali, A. Amirkhany
2021Asilomar Conference on Signals, Systems and Computers0 citations
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Session 11 Overview: Advanced Wireline Links and Techniques Wireline Subcommittee
M. Chen, Wei-Zen Chen, A. Amirkhany
2021IEEE International Solid-State Circuits Conference0 citations Open access
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A 1.5pJ/bit, 5-to-10Gbps Forwarded-Clock I/O with Per-Lane Clock De-Skew in a Low Power 28nm CMOS Process
A. Jose, V. Abramzon, Mohamed Elzeftawi, Michael Wang +5 more
2019IEEE Custom Integrated Circuits Conference0 citations
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24‐3: 10Gbps Low‐Power Transceiver PHY for Next Generation Display Interface
A. Jose, V. Abramzon, Mohamed Elzeftawi, Michael Wang +6 more
2019SID Symposium Digest of Technical Papers0 citations
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Design challenges for high performance and power efficient graphics and mobile memory interfaces
Jason Wei, A. Amirkhany, C. Yuan, B. Leibowitz +2 more
2011Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications0 citations
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Semi-Custom High-Speed Datapath Design Using Commericial ASIC Design Tools
A. Amirkhany, M. Jeeradit, M. Horowitz
20070 citations
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