D. Haerle

Most-cited papers

1. Compositional neural-network modeling of complex analog circuits

   Ramin M. Hasani, D. Haerle, Christian F. Baumgartner, A. Lomuscio +1 more

   2017IEEE International Joint Conference on Neural Network24 citations

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2. Efficient modeling of complex Analog integrated circuits using neural networks

   Ramin M. Hasani, D. Haerle, R. Grosu

   2016Prime17 citations

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3. Production Tests Coverage Analysis in the Simulation Environment

   Niveditha Manjunath, D. Haerle, Stephen Sabanal, H. Eichinger +6 more

   2018International Test Conference5 citations

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4. Enhancement of the DPI method for IC immunity characterization

   Andrea Lavarda, B. Deutschmann, D. Haerle

   2017International Workshop on Electromagnetic Compatibility of Integrated Circuits5 citations

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5. Mixed-abstraction Modeling Approach with Fault Injection for Hardware-Firmware Co-design and Functional Co-verification of an Automotive Airbag System on Chip Product

   Thang Nguyen, D. Haerle

   20135 citations

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6. A 6.25 ns random access 0.25 /spl mu/m embedded DRAM

   P. DeMone, M. Dunn, D. Haerle, Jin-Ki Kim +6 more

   20012001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)4 citations

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7. Power metallization degradation monitoring on power MOSFETs by means of concurrent degradation processes

   Sergio De Gasperi, M. Nelhiebel, D. Haerle, A. Baschirotto

   2022Journal of Power Electronics (JPE)1 citations Open access

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8. Power metallization degradation monitoring on power MOSFETs by means of concurrent degradation processes

   Sergio Gasperi, M. Nelhiebel, D. Haerle, A. Baschirotto

   20220 citations Open access

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9. A mixed-signal multi-functional system for current measurement and stress detection

   Antonio A. D'Amico, C. Djelassi, Octavian Barbu, D. Haerle +2 more

   2017Prime0 citations

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10. Measuring the effective series resistance of a capacitor

    Derek Bernardon, D. Haerle

    20090 citations

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11. Closed loop analog / digital delay.

    D. Haerle, P. Vlasenko

    20030 citations

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12. Analog / digital dll

    P. Vlasenko, D. Haerle

    20030 citations

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13. An arrangement for evaluating redundancy in a semiconductor memory chip

    P. Heyne, D. Haerle

    19980 citations

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14. Circuit arrangement for producing complementary signals

    P. Heyne, T. Graetz, D. Haerle, Bret Johnson

    19980 citations

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15. An arrangement for testing a plurality of memory chips on a wafer

    D. Haerle, Martin Buck, P. Heyne

    19980 citations

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16. Dynamic memory dual-mode

    T. Graetz, P. Heyne, D. Haerle, H. Schneider

    19970 citations

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