book chapter

High-Throughput Hardware Architecture for LDPC Decoders

Bogdan Belean^a✉

^aNational Institute for Research and Development of Isotopic and Molecular Technologies, Cluj-Napoca, Romania
✉Corresponding author

Signals and communication technology Springer Vienna2017-10-17 0 citations25 references

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TL;DRThis chapter focuses on the implementation of high-throughput LDPC decoders using field programmable gate array (FPGA) technology. (Semantic Scholar)

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High-Throughput Hardware Architecture for LDPC Decoders

Abstract

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